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HosuKim
74
Lib/asm/DSP2833x_ADC_cal.asm
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74
Lib/asm/DSP2833x_ADC_cal.asm
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;; TI File $Revision: /main/1 $
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;; Checkin $Date: July 30, 2007 10:29:23 $
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;;###########################################################################
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;;
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;; FILE: ADC_cal.asm
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;;
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;; TITLE: 2833x Boot Rom ADC Cal routine.
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;;
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;; Functions:
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;;
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;; _ADC_cal - Copies device specific calibration data into ADCREFSEL and
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;; ADCOFFTRIM registers
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;; Notes:
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;;
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;;###########################################################################
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;; $TI Release: 2833x/2823x Header Files V1.32 $
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;; $Release Date: June 28, 2010 $
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;; $Copyright:
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;// Copyright (C) 2009-2024 Texas Instruments Incorporated - http://www.ti.com/
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;//
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;// Redistribution and use in source and binary forms, with or without
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;// modification, are permitted provided that the following conditions
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;// are met:
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;//
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;// Redistributions of source code must retain the above copyright
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;// notice, this list of conditions and the following disclaimer.
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;//
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;// Redistributions in binary form must reproduce the above copyright
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;// notice, this list of conditions and the following disclaimer in the
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;// documentation and/or other materials provided with the
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;// distribution.
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;//
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;// Neither the name of Texas Instruments Incorporated nor the names of
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;// its contributors may be used to endorse or promote products derived
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;// from this software without specific prior written permission.
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;//
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;// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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;// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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;// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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;// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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;// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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;// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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;// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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;// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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;// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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;// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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;// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;// $
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;;###########################################################################
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.def _ADC_cal
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.asg "0x711C", ADCREFSEL_LOC
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;-----------------------------------------------
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; _ADC_cal
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;-----------------------------------------------
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;-----------------------------------------------
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; This is the ADC cal routine.This routine is programmed into
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; reserved memory by the factory. 0xAAAA and 0xBBBB are place-
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; holders for calibration data.
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;The actual values programmed by TI are device specific.
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;
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; This function assumes that the clocks have been
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; enabled to the ADC module.
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;-----------------------------------------------
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.sect ".adc_cal"
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_ADC_cal
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MOVW DP, #ADCREFSEL_LOC >> 6
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MOV @28, #0xAAAA ; actual value may not be 0xAAAA
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MOV @29, #0xBBBB ; actual value may not be 0xBBBB
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LRETR
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;eof ----------
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76
Lib/asm/DSP2833x_usDelay.asm
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76
Lib/asm/DSP2833x_usDelay.asm
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;// TI File $Revision: /main/4 $
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;// Checkin $Date: July 30, 2007 10:28:57 $
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;//###########################################################################
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;//
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;// FILE: DSP2833x_usDelay.asm
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;//
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;// TITLE: Simple delay function
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;//
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;// DESCRIPTION:
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;//
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;// This is a simple delay function that can be used to insert a specified
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;// delay into code.
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;//
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;// This function is only accurate if executed from internal zero-waitstate
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;// SARAM. If it is executed from waitstate memory then the delay will be
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;// longer then specified.
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;//
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;// To use this function:
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;//
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;// 1 - update the CPU clock speed in the DSP2833x_Examples.h
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;// file. For example:
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;// #define CPU_RATE 6.667L // for a 150MHz CPU clock speed
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;// or #define CPU_RATE 10.000L // for a 100MHz CPU clock speed
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;//
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;// 2 - Call this function by using the DELAY_US(A) macro
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;// that is defined in the DSP2833x_Examples.h file. This macro
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;// will convert the number of microseconds specified
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;// into a loop count for use with this function.
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;// This count will be based on the CPU frequency you specify.
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;//
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;// 3 - For the most accurate delay
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;// - Execute this function in 0 waitstate RAM.
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;// - Disable interrupts before calling the function
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;// If you do not disable interrupts, then think of
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;// this as an "at least" delay function as the actual
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;// delay may be longer.
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;//
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;// The C assembly call from the DELAY_US(time) macro will
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;// look as follows:
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;//
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;// extern void Delay(long LoopCount);
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;//
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;// MOV AL,#LowLoopCount
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;// MOV AH,#HighLoopCount
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;// LCR _Delay
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;//
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;// Or as follows (if count is less then 16-bits):
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;//
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;// MOV ACC,#LoopCount
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;// LCR _Delay
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;//
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;//
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;//###########################################################################
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;// $TI Release: DSP2833x Header Files V1.00 $
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;// $Release Date: September 7, 2007 $
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;//###########################################################################
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.def _DSP28x_usDelay
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.text
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.global __DSP28x_usDelay
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_DSP28x_usDelay:
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SUB ACC,#1
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BF _DSP28x_usDelay,GEQ ;; Loop if ACC >= 0
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LRETR
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;There is a 9/10 cycle overhead and each loop
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;takes five cycles. The LoopCount is given by
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;the following formula:
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; DELAY_CPU_CYCLES = 9 + 5*LoopCount
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; LoopCount = (DELAY_CPU_CYCLES - 9) / 5
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; The macro DELAY_US(A) performs this calculation for you
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;
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;//===========================================================================
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;// End of file.
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;//===========================================================================
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88
Lib/asm/DSP28xxx_CodeStartBranch.asm
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88
Lib/asm/DSP28xxx_CodeStartBranch.asm
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;// TI File $Revision: /main/1 $
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;// Checkin $Date: December 1, 2004 11:11:32 $
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;//###########################################################################
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;//
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;// FILE: DSP28xxx_CodeStartBranch.asm
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;//
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;// TITLE: Branch for redirecting code execution after boot.
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;//
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;// For these examples, code_start is the first code that is executed after
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;// exiting the boot ROM code.
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;//
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;// The codestart section in the linker cmd file is used to physically place
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;// this code at the correct memory location. This section should be placed
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;// at the location the BOOT ROM will re-direct the code to. For example,
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;// for boot to FLASH this code will be located at 0x3f7ff6.
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;//
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;// From this code the watchdog will be disabled followed by calling the
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;// copy_section function to copy sections from flash to ram.
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;//
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;// In addition, the example DSP28xxx projects are setup such that the codegen
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;// entry point is also set to the code_start label. This is done by linker
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;// option -e in the project build options. When the debugger loads the code,
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;// it will automatically set the PC to the "entry point" address indicated by
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;// the -e linker option. In this case the debugger is simply assigning the PC,
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;// it is not the same as a full reset of the device.
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;//
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;// The compiler may warn that the entry point for the project is other then
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;// _c_init00. _c_init00 is the C environment setup and is run before
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;// main() is entered. The copy_sections code will re-direct the execution
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;// to _c_init00 and thus there is no worry and this warning can be ignored.
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;//
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;//###########################################################################
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;// $TI Release: DSP280x, DSP2801x Header Files V1.41 $
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;// $Release Date: August 7th, 2006 $
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;// Modified by: Tim Love
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;// Modified Date: March 2008
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;//###########################################################################
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***********************************************************************
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WD_DISABLE .set 1 ;set to 1 to disable WD, else set to 0
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.ref copy_sections
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.global code_start
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***********************************************************************
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* Function: codestart section
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*
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* Description: Branch to code starting point
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***********************************************************************
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.sect "codestart"
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code_start:
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.if WD_DISABLE == 1
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LB wd_disable ;Branch to watchdog disable code
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.else
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LB copy_sections ;Branch to copy_sections
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.endif
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;end codestart section
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***********************************************************************
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* Function: wd_disable
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*
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* Description: Disables the watchdog timer
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***********************************************************************
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.if WD_DISABLE == 1
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.sect "wddisable"
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wd_disable:
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SETC OBJMODE ;Set OBJMODE for 28x object code
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EALLOW ;Enable EALLOW protected register access
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MOVZ DP, #7029h>>6 ;Set data page for WDCR register
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MOV @7029h, #0068h ;Set WDDIS bit in WDCR to disable WD
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EDIS ;Disable EALLOW protected register access
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LB copy_sections ;Branch to copy_sections
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.endif
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;end wd_disable
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.end
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;//===========================================================================
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;// End of file.
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;//===========================================================================
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88
Lib/asm/DSP28xxx_SectionCopy_nonBIOS.asm
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88
Lib/asm/DSP28xxx_SectionCopy_nonBIOS.asm
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;############################################################################
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;
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; FILE: DSP28xxx_SectionCopy_nonBIOS.asm
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;
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; DESCRIPTION: Provides functionality for copying intialized sections from
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; flash to ram at runtime before entering the _c_int00 startup
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; routine
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;############################################################################
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; Author: Tim Love
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; Release Date: March 2008
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;############################################################################
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.ref _c_int00
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.global copy_sections
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.global _cinit_loadstart, _cinit_runstart, _cinit_size
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.global _const_loadstart, _const_runstart, _const_size
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.global _econst_loadstart, _econst_runstart, _econst_size
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.global _pinit_loadstart, _pinit_runstart, _pinit_size
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.global _switch_loadstart, _switch_runstart, _switch_size
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.global _text_loadstart, _text_runstart, _text_size
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***********************************************************************
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* Function: copy_sections
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*
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* Description: Copies initialized sections from flash to ram
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***********************************************************************
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.sect "copysections"
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copy_sections:
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MOVL XAR5,#_cinit_size ; Store Section Size in XAR5
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MOVL ACC,@XAR5 ; Move Section Size to ACC
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MOVL XAR6,#_cinit_loadstart ; Store Load Starting Address in XAR6
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MOVL XAR7,#_cinit_runstart ; Store Run Address in XAR7
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LCR copy ; Branch to Copy
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MOVL XAR5,#_const_size ; Store Section Size in XAR5
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MOVL ACC,@XAR5 ; Move Section Size to ACC
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MOVL XAR6,#_const_loadstart ; Store Load Starting Address in XAR6
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MOVL XAR7,#_const_runstart ; Store Run Address in XAR7
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LCR copy ; Branch to Copy
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MOVL XAR5,#_econst_size ; Store Section Size in XAR5
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MOVL ACC,@XAR5 ; Move Section Size to ACC
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MOVL XAR6,#_econst_loadstart ; Store Load Starting Address in XAR6
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MOVL XAR7,#_econst_runstart ; Store Run Address in XAR7
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LCR copy ; Branch to Copy
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MOVL XAR5,#_pinit_size ; Store Section Size in XAR5
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MOVL ACC,@XAR5 ; Move Section Size to ACC
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MOVL XAR6,#_pinit_loadstart ; Store Load Starting Address in XAR6
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MOVL XAR7,#_pinit_runstart ; Store Run Address in XAR7
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LCR copy ; Branch to Copy
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MOVL XAR5,#_switch_size ; Store Section Size in XAR5
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MOVL ACC,@XAR5 ; Move Section Size to ACC
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MOVL XAR6,#_switch_loadstart ; Store Load Starting Address in XAR6
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MOVL XAR7,#_switch_runstart ; Store Run Address in XAR7
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LCR copy ; Branch to Copy
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MOVL XAR5,#_text_size ; Store Section Size in XAR5
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MOVL ACC,@XAR5 ; Move Section Size to ACC
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MOVL XAR6,#_text_loadstart ; Store Load Starting Address in XAR6
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MOVL XAR7,#_text_runstart ; Store Run Address in XAR7
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LCR copy ; Branch to Copy
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LB _c_int00 ; Branch to start of boot.asm in RTS library
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copy:
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B return,EQ ; Return if ACC is Zero (No section to copy)
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SUBB ACC,#1
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RPT AL ; Copy Section From Load Address to
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|| PWRITE *XAR7, *XAR6++ ; Run Address
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return:
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LRETR ; Return
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.end
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;//===========================================================================
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;// End of file.
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;//===========================================================================
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