1144 lines
44 KiB
Plaintext
1144 lines
44 KiB
Plaintext
#include "main.h"
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CCommCheck CommCheck;
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// Tx
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static CTx100 Tx100;
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static CTx101 Tx101;
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CTx102 Tx102;
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CTx103 Tx103;
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static CTx110 Tx110;
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static CTx120 Tx120;
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static CTx121 Tx121;
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static CTx130 Tx130;
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static CTx131 Tx131;
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static CTx132 Tx132;
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// Rx - GCU
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static CRx200 Rx200;
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static CRx201 Rx201;
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CRx210 Rx210;
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CRx220 Rx220;
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CRx221 Rx221;
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// Rx - ECU
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static CRx300 Rx300;
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static CRx301 Rx301;
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CRx310 Rx310;
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CRx320 Rx320;
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CRx321 Rx321;
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CRx322 Rx322;
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static void CInitECanA(void);
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static void CInitECanB(void);
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static void CECanASetMbox(void);
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static void CECanBSetMbox(void);
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static void CInitECanStructure(void);
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interrupt void CECanInterruptA(void)
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{
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struct ECAN_REGS ECanShadow;
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ECanShadow.CANRMP.all = ECanaRegs.CANRMP.all;
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GeneralOperValue.Conection.CarComputer = 1U; // 한번이라도 통신이 수신되었다면 해당 장치가 연결되었다고 판단.
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CommCheck.CarComputer = 0U; // 송신 시 타임아웃 카운트 클리어
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/*
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if (ECanShadow.CANRMP.bit.RMP15 == 1U)
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{
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ECanShadow.CANRMP.bit.RMP15 = 1U;
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}
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if (ECanShadow.CANRMP.bit.RMP16 == 1U)
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{
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ECanShadow.CANRMP.bit.RMP16 = 1U;
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}
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*/
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ECanaRegs.CANRMP.all = ECanShadow.CANRMP.all;
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}
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void CSendECanDataA(void)
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{
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struct ECAN_REGS ECanShadow;
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static Uint16 uiSendPer100ms = 0U;
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Uint16 uiTemp;
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// 10ms
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ECanaMboxes.MBOX1.MDL.byte.BYTE0 = Tx101.ApuData.PlayState & 0x7U;
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uiTemp = (Tx101.ApuData.AlarmOccured << 0U) | (Tx101.ApuData.Emergency << 1U) | (Tx101.ApuData.PowerSwitch << 2U);
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ECanaMboxes.MBOX1.MDL.byte.BYTE1 = uiTemp;
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ECanaMboxes.MBOX1.MDL.byte.BYTE2 = Tx101.ApuData.GcuPlayState & 0x7U;
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uiTemp = (Tx101.ApuData.GcuAlarmOccured << 0U) | (Tx101.ApuData.GcuShutdown << 1U);
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ECanaMboxes.MBOX1.MDL.byte.BYTE3 = uiTemp;
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uiTemp = (Tx101.ApuData.EcuAlarmOccured << 0U) |
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((Tx101.ApuData.EcuPlayState & 0x3FU) << 1U) |
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(Tx101.ApuData.OverrideActive << 4U) |
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(Tx101.ApuData.GlowPlugActive << 5U) |
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(Tx101.ApuData.HeaterActive << 6U) |
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(Tx101.ApuData.OilPressureMissing);
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ECanaMboxes.MBOX1.MDH.byte.BYTE4 = uiTemp;
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ECanaMboxes.MBOX1.MDH.byte.BYTE5 = 0;
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ECanaMboxes.MBOX1.MDH.byte.BYTE6 = 0;
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ECanaMboxes.MBOX1.MDH.byte.BYTE7 = 0;
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ECanShadow.CANTRS.all = ECanaRegs.CANTRS.all;
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ECanShadow.CANTRS.bit.TRS0 = 1U;
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ECanaRegs.CANTRS.all = ECanShadow.CANTRS.all;
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ECanShadow.CANTA.all = ECanaRegs.CANTA.all;
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ECanShadow.CANTA.bit.TA0 = 1U;
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ECanaRegs.CANTA.all = ECanShadow.CANTA.all;
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// 100ms
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if(uiSendPer100ms == 0U)
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{
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ECanShadow.CANTRS.all = ECanaRegs.CANTRS.all;
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ECanShadow.CANTRS.bit.TRS0 = 1U;
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ECanaRegs.CANTRS.all = ECanShadow.CANTRS.all;
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ECanShadow.CANTA.all = ECanaRegs.CANTA.all;
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ECanShadow.CANTA.bit.TA0 = 1U;
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ECanaRegs.CANTA.all = ECanShadow.CANTA.all;
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}
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uiSendPer100ms = (uiSendPer100ms + 1U) % 10U;
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}
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static void CInitECanA(void)
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{
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/* Create a shadow register structure for the CAN control registers. This is
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needed, since only 32-bit access is allowed to these registers. 16-bit access
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to these registers could potentially corrupt the register contents or return
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false data. This is especially true while writing to/reading from a bit
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(or group of bits) among bits 16 - 31 */
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struct ECAN_REGS ECanaShadow = {};
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EALLOW; // EALLOW enables access to protected bits
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/* Enable internal pull-up for the selected CAN pins */
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// Pull-ups can be enabled or disabled by the user.
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// This will enable the pullups for the specified pins.
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// Comment out other unwanted lines.
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GpioCtrlRegs.GPAPUD.bit.GPIO18 = 0x00U; // Enable pull-up CANRXA
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GpioCtrlRegs.GPAPUD.bit.GPIO19 = 0x00U; // Enable pull-up CANTXA
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/* Set qualification for selected CAN pins to asynch only */
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// Inputs are synchronized to SYSCLKOUT by default.
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// This will select asynch (no qualification) for the selected pins.
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GpioCtrlRegs.GPAQSEL2.bit.GPIO18 = 0x03U; // Asynch qual for CANRXA
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/* Configure eCAN-A pins using GPIO regs*/
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// This specifies which of the possible GPIO pins will be eCAN functional pins.
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GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 0x03U; // Configure CANRXA operation
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GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 0x03U; // Configure CANTXA operation
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/* Configure eCAN RX and TX pins for CAN operation using eCAN regs*/
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ECanaShadow.CANTIOC.all = ECanaRegs.CANTIOC.all;
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ECanaShadow.CANTIOC.bit.TXFUNC = 1U;
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ECanaRegs.CANTIOC.all = ECanaShadow.CANTIOC.all;
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ECanaShadow.CANRIOC.all = ECanaRegs.CANRIOC.all;
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ECanaShadow.CANRIOC.bit.RXFUNC = 1U;
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ECanaRegs.CANRIOC.all = ECanaShadow.CANRIOC.all;
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/* Configure eCAN for HECC mode - (reqd to access mailboxes 16 thru 31) */
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// HECC mode also enables time-stamping feature
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ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
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ECanaShadow.CANMC.bit.SCB = 1;
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ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;
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// TAn, RMPn, GIFn bits are all zero upon reset and are cleared again
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// as a matter of precaution.
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ECanaRegs.CANTA.all = 0xFFFFFFFFU; /* Clear all TAn bits */
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ECanaRegs.CANRMP.all = 0xFFFFFFFFU; /* Clear all RMPn bits */
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ECanaRegs.CANGIF0.all = 0xFFFFFFFFU; /* Clear all interrupt flag bits */
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ECanaRegs.CANGIF1.all = 0xFFFFFFFFU;
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/* Configure bit timing parameters for eCANB*/
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ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
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ECanaShadow.CANMC.bit.CCR = 1U; // Set CCR = 1
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ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;
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ECanaShadow.CANES.all = ECanaRegs.CANES.all;
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do
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{
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ECanaShadow.CANES.all = ECanaRegs.CANES.all;
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} while(ECanaShadow.CANES.bit.CCE != 1U); // Wait for CCE bit to be set..
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ECanaShadow.CANBTC.all = 0U;
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// 250 [Kbps]
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ECanaShadow.CANBTC.bit.BRPREG = 19U;
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ECanaShadow.CANBTC.bit.TSEG1REG = 10U;
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ECanaShadow.CANBTC.bit.TSEG2REG = 2U;
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ECanaShadow.CANBTC.bit.SAM = 1U;
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ECanaShadow.CANBTC.bit.SJWREG = 2U;
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ECanaRegs.CANBTC.all = ECanaShadow.CANBTC.all;
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ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
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ECanaShadow.CANMC.bit.CCR = 0U;
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ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;
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ECanaShadow.CANES.all = ECanaRegs.CANES.all;
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do
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{
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ECanaShadow.CANES.all = ECanaRegs.CANES.all;
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} while (ECanaShadow.CANES.bit.CCE != 0U); // Wait for CCE bit to be cleared..
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/* Disable all Mailboxes */
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ECanaRegs.CANME.all = 0U; // Required before writing the MSGIDs
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EDIS;
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CECanASetMbox();
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}
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static void CECanASetMbox(void)
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{
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struct ECAN_REGS ECanShadow = {};
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/* Tx Can MBox */
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ECanaMboxes.MBOX0.MSGID.bit.IDE = 0U; // ID E®Aa ¿ⓒºI '0' - 11bit ID ≫c¿e
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ECanaMboxes.MBOX0.MSGID.bit.STDMSGID = 0x100U;
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ECanaMboxes.MBOX0.MSGID.bit.AME = 0U;
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ECanaMboxes.MBOX0.MSGCTRL.bit.DLC = 8U;
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ECanaMboxes.MBOX0.MSGCTRL.bit.RTR = 0U;
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ECanaMboxes.MBOX0.MDH.all = 0x00000000U;
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ECanaMboxes.MBOX0.MDL.all = 0x00000000U;
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ECanaMboxes.MBOX1.MSGID.bit.IDE = 0U;
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ECanaMboxes.MBOX1.MSGID.bit.STDMSGID = 0x101U;
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ECanaMboxes.MBOX1.MSGID.bit.AME = 0U;
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ECanaMboxes.MBOX1.MSGCTRL.bit.DLC = 8U;
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ECanaMboxes.MBOX1.MSGCTRL.bit.RTR = 0U;
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ECanaMboxes.MBOX1.MDH.all = 0x00000000U;
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ECanaMboxes.MBOX1.MDL.all = 0x00000000U;
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ECanaMboxes.MBOX2.MSGID.bit.IDE = 0U;
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ECanaMboxes.MBOX2.MSGID.bit.STDMSGID = 0x102U;
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ECanaMboxes.MBOX2.MSGID.bit.AME = 0U;
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ECanaMboxes.MBOX2.MSGCTRL.bit.DLC = 8U;
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ECanaMboxes.MBOX2.MSGCTRL.bit.RTR = 0U;
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ECanaMboxes.MBOX2.MDH.all = 0x00000000U;
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ECanaMboxes.MBOX2.MDL.all = 0x00000000U;
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ECanaMboxes.MBOX3.MSGID.bit.IDE = 0U;
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ECanaMboxes.MBOX3.MSGID.bit.STDMSGID = 0x103U;
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ECanaMboxes.MBOX3.MSGID.bit.AME = 0U;
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ECanaMboxes.MBOX3.MSGCTRL.bit.DLC = 8U;
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ECanaMboxes.MBOX3.MSGCTRL.bit.RTR = 0U;
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ECanaMboxes.MBOX3.MDH.all = 0x00000000U;
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ECanaMboxes.MBOX3.MDL.all = 0x00000000U;
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ECanaMboxes.MBOX4.MSGID.bit.IDE = 0U;
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ECanaMboxes.MBOX4.MSGID.bit.STDMSGID = 0x110U;
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ECanaMboxes.MBOX4.MSGID.bit.AME = 0U;
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ECanaMboxes.MBOX4.MSGCTRL.bit.DLC = 8U;
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ECanaMboxes.MBOX4.MSGCTRL.bit.RTR = 0U;
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ECanaMboxes.MBOX4.MDH.all = 0x00000000U;
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ECanaMboxes.MBOX4.MDL.all = 0x00000000U;
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ECanaMboxes.MBOX5.MSGID.bit.IDE = 0U;
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ECanaMboxes.MBOX5.MSGID.bit.STDMSGID = 0x120U;
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ECanaMboxes.MBOX5.MSGID.bit.AME = 0U;
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ECanaMboxes.MBOX5.MSGCTRL.bit.DLC = 8U;
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ECanaMboxes.MBOX5.MSGCTRL.bit.RTR = 0U;
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ECanaMboxes.MBOX5.MDH.all = 0x00000000U;
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ECanaMboxes.MBOX5.MDL.all = 0x00000000U;
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ECanaMboxes.MBOX6.MSGID.bit.IDE = 0U;
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ECanaMboxes.MBOX6.MSGID.bit.STDMSGID = 0x121U;
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ECanaMboxes.MBOX6.MSGID.bit.AME = 0U;
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ECanaMboxes.MBOX6.MSGCTRL.bit.DLC = 8U;
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ECanaMboxes.MBOX6.MSGCTRL.bit.RTR = 0U;
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ECanaMboxes.MBOX6.MDH.all = 0x00000000U;
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ECanaMboxes.MBOX6.MDL.all = 0x00000000U;
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ECanaMboxes.MBOX7.MSGID.bit.IDE = 0U;
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ECanaMboxes.MBOX7.MSGID.bit.STDMSGID = 0x130U;
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ECanaMboxes.MBOX7.MSGID.bit.AME = 0U;
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ECanaMboxes.MBOX7.MSGCTRL.bit.DLC = 8U;
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ECanaMboxes.MBOX7.MSGCTRL.bit.RTR = 0U;
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ECanaMboxes.MBOX7.MDH.all = 0x00000000U;
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ECanaMboxes.MBOX7.MDL.all = 0x00000000U;
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ECanaMboxes.MBOX8.MSGID.bit.IDE = 0U;
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ECanaMboxes.MBOX8.MSGID.bit.STDMSGID = 0x131U;
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ECanaMboxes.MBOX8.MSGID.bit.AME = 0U;
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ECanaMboxes.MBOX8.MSGCTRL.bit.DLC = 8U;
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ECanaMboxes.MBOX8.MSGCTRL.bit.RTR = 0U;
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ECanaMboxes.MBOX8.MDH.all = 0x00000000U;
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ECanaMboxes.MBOX8.MDL.all = 0x00000000U;
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ECanaMboxes.MBOX9.MSGID.bit.IDE = 0U;
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ECanaMboxes.MBOX9.MSGID.bit.STDMSGID = 0x132U;
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ECanaMboxes.MBOX9.MSGID.bit.AME = 0U;
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ECanaMboxes.MBOX9.MSGCTRL.bit.DLC = 8U;
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ECanaMboxes.MBOX9.MSGCTRL.bit.RTR = 0U;
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ECanaMboxes.MBOX9.MDH.all = 0x00000000U;
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ECanaMboxes.MBOX9.MDL.all = 0x00000000U;
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/* Rx Can MBox(GCU)*/
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ECanaMboxes.MBOX15.MSGID.bit.IDE = 0U;
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ECanaMboxes.MBOX15.MSGID.bit.STDMSGID = 0x200U;
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ECanaMboxes.MBOX15.MSGID.bit.AME = 0U;
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ECanaMboxes.MBOX15.MSGCTRL.bit.DLC = 8U;
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ECanaMboxes.MBOX15.MSGCTRL.bit.RTR = 0U;
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ECanaMboxes.MBOX15.MDH.all = 0x00000000U;
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ECanaMboxes.MBOX15.MDL.all = 0x00000000U;
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ECanaMboxes.MBOX16.MSGID.bit.IDE = 0U;
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ECanaMboxes.MBOX16.MSGID.bit.STDMSGID = 0x201U;
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ECanaMboxes.MBOX16.MSGID.bit.AME = 0U;
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ECanaMboxes.MBOX16.MSGCTRL.bit.DLC = 8U;
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ECanaMboxes.MBOX16.MSGCTRL.bit.RTR = 0U;
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ECanaMboxes.MBOX16.MDH.all = 0x00000000U;
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ECanaMboxes.MBOX16.MDL.all = 0x00000000U;
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ECanaMboxes.MBOX17.MSGID.bit.IDE = 0U;
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ECanaMboxes.MBOX17.MSGID.bit.STDMSGID = 0x210U;
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ECanaMboxes.MBOX17.MSGID.bit.AME = 0U;
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ECanaMboxes.MBOX17.MSGCTRL.bit.DLC = 8U;
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ECanaMboxes.MBOX17.MSGCTRL.bit.RTR = 0U;
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ECanaMboxes.MBOX17.MDH.all = 0x00000000U;
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ECanaMboxes.MBOX17.MDL.all = 0x00000000U;
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ECanaMboxes.MBOX18.MSGID.bit.IDE = 0U;
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ECanaMboxes.MBOX18.MSGID.bit.STDMSGID = 0x220U;
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ECanaMboxes.MBOX18.MSGID.bit.AME = 0U;
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ECanaMboxes.MBOX18.MSGCTRL.bit.DLC = 8U;
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ECanaMboxes.MBOX18.MSGCTRL.bit.RTR = 0U;
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ECanaMboxes.MBOX18.MDH.all = 0x00000000U;
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ECanaMboxes.MBOX18.MDL.all = 0x00000000U;
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ECanaMboxes.MBOX19.MSGID.bit.IDE = 0U;
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ECanaMboxes.MBOX19.MSGID.bit.STDMSGID = 0x221U;
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ECanaMboxes.MBOX19.MSGID.bit.AME = 0U;
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ECanaMboxes.MBOX19.MSGCTRL.bit.DLC = 8U;
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ECanaMboxes.MBOX19.MSGCTRL.bit.RTR = 0U;
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ECanaMboxes.MBOX19.MDH.all = 0x00000000U;
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ECanaMboxes.MBOX19.MDL.all = 0x00000000U;
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/* Rx Can MBox(ECU)*/
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ECanaMboxes.MBOX25.MSGID.bit.IDE = 0U;
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ECanaMboxes.MBOX25.MSGID.bit.STDMSGID = 0x300U;
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ECanaMboxes.MBOX25.MSGID.bit.AME = 0U;
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ECanaMboxes.MBOX25.MSGCTRL.bit.DLC = 8U;
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ECanaMboxes.MBOX25.MSGCTRL.bit.RTR = 0U;
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ECanaMboxes.MBOX25.MDH.all = 0x00000000U;
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ECanaMboxes.MBOX25.MDL.all = 0x00000000U;
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ECanaMboxes.MBOX26.MSGID.bit.IDE = 0U;
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ECanaMboxes.MBOX26.MSGID.bit.STDMSGID = 0x301U;
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ECanaMboxes.MBOX26.MSGID.bit.AME = 0U;
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ECanaMboxes.MBOX26.MSGCTRL.bit.DLC = 8U;
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ECanaMboxes.MBOX26.MSGCTRL.bit.RTR = 0U;
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ECanaMboxes.MBOX26.MDH.all = 0x00000000U;
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ECanaMboxes.MBOX26.MDL.all = 0x00000000U;
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ECanaMboxes.MBOX27.MSGID.bit.IDE = 0U;
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ECanaMboxes.MBOX27.MSGID.bit.STDMSGID = 0x310U;
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ECanaMboxes.MBOX27.MSGID.bit.AME = 0U;
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ECanaMboxes.MBOX27.MSGCTRL.bit.DLC = 8U;
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ECanaMboxes.MBOX27.MSGCTRL.bit.RTR = 0U;
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ECanaMboxes.MBOX27.MDH.all = 0x00000000U;
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ECanaMboxes.MBOX27.MDL.all = 0x00000000U;
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ECanaMboxes.MBOX28.MSGID.bit.IDE = 0U;
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ECanaMboxes.MBOX28.MSGID.bit.STDMSGID = 0x320U;
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ECanaMboxes.MBOX28.MSGID.bit.AME = 0U;
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ECanaMboxes.MBOX28.MSGCTRL.bit.DLC = 8U;
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ECanaMboxes.MBOX28.MSGCTRL.bit.RTR = 0U;
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ECanaMboxes.MBOX28.MDH.all = 0x00000000U;
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ECanaMboxes.MBOX28.MDL.all = 0x00000000U;
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ECanaMboxes.MBOX29.MSGID.bit.IDE = 0U;
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ECanaMboxes.MBOX29.MSGID.bit.STDMSGID = 0x321U;
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ECanaMboxes.MBOX29.MSGID.bit.AME = 0U;
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ECanaMboxes.MBOX29.MSGCTRL.bit.DLC = 8U;
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ECanaMboxes.MBOX29.MSGCTRL.bit.RTR = 0U;
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ECanaMboxes.MBOX29.MDH.all = 0x00000000U;
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ECanaMboxes.MBOX29.MDL.all = 0x00000000U;
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ECanaMboxes.MBOX30.MSGID.bit.IDE = 0U;
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ECanaMboxes.MBOX30.MSGID.bit.STDMSGID = 0x322U;
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ECanaMboxes.MBOX30.MSGID.bit.AME = 0U;
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ECanaMboxes.MBOX30.MSGCTRL.bit.DLC = 8U;
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ECanaMboxes.MBOX30.MSGCTRL.bit.RTR = 0U;
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ECanaMboxes.MBOX30.MDH.all = 0x00000000U;
|
|
ECanaMboxes.MBOX30.MDL.all = 0x00000000U;
|
|
|
|
// Transe, Receive °aA¤, 0 is Transe, 1 is Receive
|
|
ECanShadow.CANMD.all = ECanaRegs.CANMD.all;
|
|
ECanShadow.CANMD.bit.MD0 = 0U;
|
|
ECanShadow.CANMD.bit.MD1 = 0U;
|
|
ECanShadow.CANMD.bit.MD2 = 0U;
|
|
ECanShadow.CANMD.bit.MD3 = 0U;
|
|
ECanShadow.CANMD.bit.MD4 = 0U;
|
|
ECanShadow.CANMD.bit.MD5 = 0U;
|
|
ECanShadow.CANMD.bit.MD6 = 0U;
|
|
ECanShadow.CANMD.bit.MD7 = 0U;
|
|
ECanShadow.CANMD.bit.MD8 = 0U;
|
|
ECanShadow.CANMD.bit.MD9 = 0U;
|
|
ECanShadow.CANMD.bit.MD15 = 1U;
|
|
ECanShadow.CANMD.bit.MD16 = 1U;
|
|
ECanShadow.CANMD.bit.MD17 = 1U;
|
|
ECanShadow.CANMD.bit.MD18 = 1U;
|
|
ECanShadow.CANMD.bit.MD19 = 1U;
|
|
ECanShadow.CANMD.bit.MD25 = 1U;
|
|
ECanShadow.CANMD.bit.MD26 = 1U;
|
|
ECanShadow.CANMD.bit.MD27 = 1U;
|
|
ECanShadow.CANMD.bit.MD28 = 1U;
|
|
ECanShadow.CANMD.bit.MD29 = 1U;
|
|
ECanShadow.CANMD.bit.MD30 = 1U;
|
|
ECanaRegs.CANMD.all = ECanShadow.CANMD.all;
|
|
|
|
// MailBox Enable/Disable, 0 is Disable, 1 is Enable
|
|
ECanShadow.CANME.all = ECanaRegs.CANME.all;
|
|
ECanShadow.CANME.bit.ME0 = 1U;
|
|
ECanShadow.CANME.bit.ME1 = 1U;
|
|
ECanShadow.CANME.bit.ME2 = 1U;
|
|
ECanShadow.CANME.bit.ME3 = 1U;
|
|
ECanShadow.CANME.bit.ME4 = 1U;
|
|
ECanShadow.CANME.bit.ME5 = 1U;
|
|
ECanShadow.CANME.bit.ME6 = 1U;
|
|
ECanShadow.CANME.bit.ME7 = 1U;
|
|
ECanShadow.CANME.bit.ME8 = 1U;
|
|
ECanShadow.CANME.bit.ME9 = 1U;
|
|
ECanShadow.CANME.bit.ME15 = 1U;
|
|
ECanShadow.CANME.bit.ME16 = 1U;
|
|
ECanShadow.CANME.bit.ME17 = 1U;
|
|
ECanShadow.CANME.bit.ME18 = 1U;
|
|
ECanShadow.CANME.bit.ME19 = 1U;
|
|
ECanShadow.CANME.bit.ME25 = 1U;
|
|
ECanShadow.CANME.bit.ME26 = 1U;
|
|
ECanShadow.CANME.bit.ME27 = 1U;
|
|
ECanShadow.CANME.bit.ME28 = 1U;
|
|
ECanShadow.CANME.bit.ME29 = 1U;
|
|
ECanShadow.CANME.bit.ME30 = 1U;
|
|
ECanaRegs.CANME.all = ECanShadow.CANME.all;
|
|
|
|
EALLOW;
|
|
ECanShadow.CANMC.all = ECanaRegs.CANMC.all;
|
|
ECanShadow.CANMC.bit.STM = 0U; // '1' CAN Self-test Mode ¼³A¤
|
|
ECanShadow.CANMC.bit.ABO = 1U; // '1' CAN Auto Bus On
|
|
ECanaRegs.CANMC.all = ECanShadow.CANMC.all;
|
|
|
|
// Interrupt Enable(Receive Interrupt), 0 is Disable, 1 is Enable
|
|
ECanShadow.CANMIM.all = ECanaRegs.CANMIM.all;
|
|
ECanShadow.CANMIM.bit.MIM15 = 1U;
|
|
ECanShadow.CANMIM.bit.MIM16 = 1U;
|
|
ECanShadow.CANMIM.bit.MIM17 = 1U;
|
|
ECanShadow.CANMIM.bit.MIM18 = 1U;
|
|
ECanShadow.CANMIM.bit.MIM19 = 1U;
|
|
ECanShadow.CANMIM.bit.MIM25 = 1U;
|
|
ECanShadow.CANMIM.bit.MIM26 = 1U;
|
|
ECanShadow.CANMIM.bit.MIM27 = 1U;
|
|
ECanShadow.CANMIM.bit.MIM28 = 1U;
|
|
ECanShadow.CANMIM.bit.MIM29 = 1U;
|
|
ECanShadow.CANMIM.bit.MIM30 = 1U;
|
|
ECanaRegs.CANMIM.all = ECanShadow.CANMIM.all;
|
|
|
|
// Groble Interrupt
|
|
ECanShadow.CANGIM.all = ECanaRegs.CANGIM.all;
|
|
ECanShadow.CANGIM.bit.I0EN = 1U; // Line 0 Interrupt Enable
|
|
ECanShadow.CANGIM.bit.GIL = 0U; // All global interrupts are mapped to the ECAN0INT interrupt line.
|
|
ECanaRegs.CANGIM.all = ECanShadow.CANGIM.all;
|
|
EDIS;
|
|
}
|
|
|
|
interrupt void CECanInterruptB(void)
|
|
{
|
|
Uint32 ECanRMPbit;
|
|
Uint32 uiMBOXMdl = 0UL;
|
|
Uint32 uiMBOXMdh = 0UL;
|
|
|
|
ECanRMPbit = ECanbRegs.CANRMP.all;
|
|
|
|
// ---------------------------------------------------------
|
|
// MBOX15 - 200h
|
|
// ---------------------------------------------------------
|
|
if ((ECanRMPbit & (1UL << 15U)) != 0U)
|
|
{
|
|
GeneralOperValue.Conection.Gcu = 1U;
|
|
|
|
uiMBOXMdl = ECanbMboxes.MBOX15.MDL.all;
|
|
uiMBOXMdh = ECanbMboxes.MBOX15.MDH.all;
|
|
|
|
Uint16 uiByte0 = (Uint16)((uiMBOXMdl >> 24U) & 0xFFU);
|
|
Uint16 uiByte1 = (Uint16)((uiMBOXMdl >> 16U) & 0xFFU);
|
|
|
|
Rx200.GcuData.HeartBit = uiByte0 | (uiByte1 << 8U);
|
|
|
|
Rx200.GcuData.VersionMajor = (Uint8)((uiMBOXMdh >> 16U) & 0xFFU); // Byte 5
|
|
Rx200.GcuData.VersionMinor = (Uint8)((uiMBOXMdh >> 8U) & 0xFFU); // Byte 6
|
|
Rx200.GcuData.VersionPatch = (Uint8)((uiMBOXMdh >> 0U) & 0xFFU); // Byte 7
|
|
}
|
|
|
|
// ---------------------------------------------------------
|
|
// MBOX16 - 201h
|
|
// ---------------------------------------------------------
|
|
if ((ECanRMPbit & (1UL << 16U)) != 0U)
|
|
{
|
|
uiMBOXMdl = ECanbMboxes.MBOX16.MDL.all;
|
|
|
|
Rx201.GcuData.PlayState = (Uint16)((uiMBOXMdl >> 24U) & 0x7U);
|
|
|
|
Rx201.GcuData.AlarmOccured = (Uint16)((uiMBOXMdl >> 16U) & 0x1U);
|
|
Rx201.GcuData.Shutdown = (Uint16)((uiMBOXMdl >> 17U) & 0x1U);
|
|
}
|
|
|
|
// ---------------------------------------------------------
|
|
// MBOX17 - 210h (비트 필드 매핑 반전)
|
|
// ---------------------------------------------------------
|
|
if ((ECanRMPbit & (1UL << 17U)) != 0U)
|
|
{
|
|
uiMBOXMdl = ECanbMboxes.MBOX17.MDL.all;
|
|
|
|
Rx210.GcuWarning.bit.PcbOverHeat = (Uint16)((uiMBOXMdl >> 24U) & 0x1U);
|
|
Rx210.GcuWarning.bit.FetOverHeat = (Uint16)((uiMBOXMdl >> 25U) & 0x1U);
|
|
Rx210.GcuWarning.bit.GenOverHeat1 = (Uint16)((uiMBOXMdl >> 26U) & 0x1U);
|
|
Rx210.GcuWarning.bit.GenOverHeat2 = (Uint16)((uiMBOXMdl >> 27U) & 0x1U);
|
|
|
|
Rx210.GcuFault.bit.HwTrip = (Uint16)((uiMBOXMdl >> 8U) & 0x1U);
|
|
Rx210.GcuFault.bit.HwIgbt = (Uint16)((uiMBOXMdl >> 9U) & 0x1U);
|
|
Rx210.GcuFault.bit.HwDc = (Uint16)((uiMBOXMdl >> 10U) & 0x1U);
|
|
Rx210.GcuFault.bit.GenOverCurrentU = (Uint16)((uiMBOXMdl >> 11U) & 0x1U);
|
|
Rx210.GcuFault.bit.GenOverCurrentV = (Uint16)((uiMBOXMdl >> 12U) & 0x1U);
|
|
Rx210.GcuFault.bit.GenOverCurrentW = (Uint16)((uiMBOXMdl >> 13U) & 0x1U);
|
|
Rx210.GcuFault.bit.DcOverVoltage = (Uint16)((uiMBOXMdl >> 14U) & 0x1U);
|
|
Rx210.GcuFault.bit.DcOverCurrent = (Uint16)((uiMBOXMdl >> 15U) & 0x1U);
|
|
|
|
Rx210.GcuFault.bit.CrankningOverCurrent = (Uint16)((uiMBOXMdl >> 0U) & 0x1U);
|
|
Rx210.GcuFault.bit.PcbOverHeat = (Uint16)((uiMBOXMdl >> 1U) & 0x1U);
|
|
Rx210.GcuFault.bit.FetOverHeat = (Uint16)((uiMBOXMdl >> 2U) & 0x1U);
|
|
Rx210.GcuFault.bit.GenTempOverHeat1 = (Uint16)((uiMBOXMdl >> 3U) & 0x1U);
|
|
Rx210.GcuFault.bit.GenTempOverHeat2 = (Uint16)((uiMBOXMdl >> 4U) & 0x1U);
|
|
Rx210.GcuFault.bit.GenOverSpeed = (Uint16)((uiMBOXMdl >> 5U) & 0x1U);
|
|
Rx210.GcuFault.bit.ResolverIC = (Uint16)((uiMBOXMdl >> 6U) & 0x1U);
|
|
Rx210.GcuFault.bit.ResolverParity = (Uint16)((uiMBOXMdl >> 7U) & 0x1U);
|
|
}
|
|
|
|
// ---------------------------------------------------------
|
|
// MBOX18 - 220h
|
|
// ---------------------------------------------------------
|
|
if ((ECanRMPbit & (1UL << 18U)) != 0U)
|
|
{
|
|
uiMBOXMdl = ECanbMboxes.MBOX18.MDL.all;
|
|
uiMBOXMdh = ECanbMboxes.MBOX18.MDH.all;
|
|
|
|
// [Reverse]
|
|
// Byte 0(>>24), Byte 1(>>16)
|
|
Uint16 uiVoltL = (Uint16)((uiMBOXMdl >> 24U) & 0xFFU);
|
|
Uint16 uiVoltH = (Uint16)((uiMBOXMdl >> 16U) & 0xFFU);
|
|
Rx220.GcuData.DcVoltage = uiVoltL | (uiVoltH << 8U);
|
|
|
|
// Byte 2(>>8), Byte 3(>>0)
|
|
Uint16 uiCurrL = (Uint16)((uiMBOXMdl >> 8U) & 0xFFU);
|
|
Uint16 uiCurrH = (Uint16)((uiMBOXMdl >> 0U) & 0xFFU);
|
|
Rx220.GcuData.DcCurrent = uiCurrL | (uiCurrH << 8U);
|
|
|
|
// MDH Reverse: Byte 4(>>24), Byte 5(>>16)
|
|
Uint16 uiRpmL = (Uint16)((uiMBOXMdh >> 24U) & 0xFFU);
|
|
Uint16 uiRpmH = (Uint16)((uiMBOXMdh >> 16U) & 0xFFU);
|
|
Rx220.GcuData.Rpm = uiRpmL | (uiRpmH << 8U);
|
|
}
|
|
|
|
// ---------------------------------------------------------
|
|
// MBOX19 - 221h
|
|
// ---------------------------------------------------------
|
|
if ((ECanRMPbit & (1UL << 19U)) != 0U)
|
|
{
|
|
uiMBOXMdl = ECanbMboxes.MBOX19.MDL.all;
|
|
|
|
// [Reverse] 0(24), 1(16), 2(8), 3(0)
|
|
Rx221.GcuData.PcbTemperature = (Uint16)((uiMBOXMdl >> 24U) & 0xFFU);
|
|
Rx221.GcuData.FetTemperature = (Uint16)((uiMBOXMdl >> 16U) & 0xFFU);
|
|
Rx221.GcuData.GenTemperature1 = (Uint16)((uiMBOXMdl >> 8U) & 0xFFU);
|
|
Rx221.GcuData.GenTemperature2 = (Uint16)((uiMBOXMdl >> 0U) & 0xFFU);
|
|
}
|
|
|
|
// ---------------------------------------------------------
|
|
// MBOX25 - 300h
|
|
// ---------------------------------------------------------
|
|
if ((ECanRMPbit & (1UL << 25U)) != 0U)
|
|
{
|
|
GeneralOperValue.Conection.Ecu = 1U;
|
|
uiMBOXMdl = ECanbMboxes.MBOX25.MDL.all;
|
|
|
|
// [Reverse]
|
|
Rx300.EcuData.VersionMajor = (Uint8)((uiMBOXMdl >> 24U) & 0xFFU);
|
|
Rx300.EcuData.VersionMinor = (Uint8)((uiMBOXMdl >> 16U) & 0xFFU);
|
|
Rx300.EcuData.VersionPatch = (Uint8)((uiMBOXMdl >> 8U) & 0xFFU);
|
|
}
|
|
|
|
// ---------------------------------------------------------
|
|
// MBOX26 - 301h
|
|
// ---------------------------------------------------------
|
|
if ((ECanRMPbit & (1UL << 26U)) != 0U)
|
|
{
|
|
uiMBOXMdl = ECanbMboxes.MBOX26.MDL.all;
|
|
|
|
// [Reverse] Byte 0 -> >> 24U
|
|
Rx301.OperationInfo.AlarmOccured = (Uint16)((uiMBOXMdl >> 24U) & 0x1U);
|
|
Rx301.OperationInfo.PlayState = (Uint16)((uiMBOXMdl >> 25U) & 0x7U); // (24 + 1)
|
|
Rx301.OperationInfo.OverrideActive = (Uint16)((uiMBOXMdl >> 28U) & 0x1U); // (24 + 4)
|
|
Rx301.OperationInfo.GlowPlugActive = (Uint16)((uiMBOXMdl >> 29U) & 0x1U);
|
|
Rx301.OperationInfo.HeaterActive = (Uint16)((uiMBOXMdl >> 30U) & 0x1U);
|
|
Rx301.OperationInfo.OilPressureMissing = (Uint16)((uiMBOXMdl >> 31U) & 0x1U);
|
|
}
|
|
|
|
// ---------------------------------------------------------
|
|
// MBOX27 - 310h
|
|
// ---------------------------------------------------------
|
|
if ((ECanRMPbit & (1UL << 27U)) != 0U)
|
|
{
|
|
uiMBOXMdl = ECanbMboxes.MBOX27.MDL.all;
|
|
|
|
// [Reverse] Byte 0 -> >> 24
|
|
Rx310.EcuWarning.bit.EngineOverHeat = (Uint16)((uiMBOXMdl >> 24U) & 0x1U);
|
|
Rx310.EcuWarning.bit.reserved = (Uint16)((uiMBOXMdl >> 25U) & 0x1U);
|
|
Rx310.EcuWarning.bit.LowOilLevel = (Uint16)((uiMBOXMdl >> 26U) & 0x1U);
|
|
Rx310.EcuWarning.bit.IntakeOverHeat = (Uint16)((uiMBOXMdl >> 27U) & 0x1U);
|
|
Rx310.EcuWarning.bit.IntakeLoPressure = (Uint16)((uiMBOXMdl >> 28U) & 0x1U);
|
|
Rx310.EcuWarning.bit.EngineLoTemperature = (Uint16)((uiMBOXMdl >> 29U) & 0x1U);
|
|
Rx310.EcuWarning.bit.EngineSensor = (Uint16)((uiMBOXMdl >> 30U) & 0x1U);
|
|
Rx310.EcuWarning.bit.DefaltValueActive = (Uint16)((uiMBOXMdl >> 31U) & 0x1U);
|
|
|
|
// [Reverse] Byte 2 -> >> 8
|
|
Rx310.EcuFault.bit.OilPressureMissing = (Uint16)((uiMBOXMdl >> 8U) & 0x1U);
|
|
Rx310.EcuFault.bit.IntakeOverHeat = (Uint16)((uiMBOXMdl >> 9U) & 0x1U);
|
|
Rx310.EcuFault.bit.EngineOverHeat = (Uint16)((uiMBOXMdl >> 10U) & 0x1U);
|
|
Rx310.EcuFault.bit.Actuator = (Uint16)((uiMBOXMdl >> 11U) & 0x1U);
|
|
Rx310.EcuFault.bit.RpmSignal = (Uint16)((uiMBOXMdl >> 12U) & 0x1U);
|
|
Rx310.EcuFault.bit.EngineStartFail = (Uint16)((uiMBOXMdl >> 13U) & 0x1U);
|
|
}
|
|
|
|
// ---------------------------------------------------------
|
|
// MBOX28 - 320h
|
|
// ---------------------------------------------------------
|
|
if ((ECanRMPbit & (1UL << 28U)) != 0U)
|
|
{
|
|
uiMBOXMdl = ECanbMboxes.MBOX28.MDL.all;
|
|
uiMBOXMdh = ECanbMboxes.MBOX28.MDH.all;
|
|
|
|
// [Reverse] Byte 0(>>24), 1(>>16)
|
|
Uint16 uiActRpmL = (Uint16)((uiMBOXMdl >> 24U) & 0xFFU);
|
|
Uint16 uiActRpmH = (Uint16)((uiMBOXMdl >> 16U) & 0xFFU);
|
|
Rx320.EcuData.ActualRpm = uiActRpmL | (uiActRpmH << 8U);
|
|
|
|
// [Reverse] Byte 2(>>8), 3(>>0)
|
|
Uint16 uiSetRpmL = (Uint16)((uiMBOXMdl >> 8U) & 0xFFU);
|
|
Uint16 uiSetRpmH = (Uint16)((uiMBOXMdl >> 0U) & 0xFFU);
|
|
Rx320.EcuData.SetRpm = uiSetRpmL | (uiSetRpmH << 8U);
|
|
|
|
// [Reverse] Byte 4(>>24), 5(>>16) (MDH)
|
|
Rx320.EcuData.ActualTorque = (Uint16)((uiMBOXMdh >> 24U) & 0xFFU);
|
|
Rx320.EcuData.SetTorque = (Uint16)((uiMBOXMdh >> 16U) & 0xFFU);
|
|
|
|
// [Reverse] Byte 6(>>8), 7(>>0)
|
|
Uint16 uiSysVoltL = (Uint16)((uiMBOXMdh >> 8U) & 0xFFU);
|
|
Uint16 uiSysVoltH = (Uint16)((uiMBOXMdh >> 0U) & 0xFFU);
|
|
Rx320.EcuData.SystemVoltage = uiSysVoltL | (uiSysVoltH << 8U);
|
|
}
|
|
|
|
// ---------------------------------------------------------
|
|
// MBOX29 - 321h
|
|
// ---------------------------------------------------------
|
|
if ((ECanRMPbit & (1UL << 29U)) != 0U)
|
|
{
|
|
uiMBOXMdl = ECanbMboxes.MBOX29.MDL.all;
|
|
uiMBOXMdh = ECanbMboxes.MBOX29.MDH.all;
|
|
|
|
// [Reverse]
|
|
Rx321.EcuData.CoolantTemperature = (Uint16)((uiMBOXMdl >> 24U) & 0xFFU);
|
|
Rx321.EcuData.Fan1Speed = (Uint16)((uiMBOXMdl >> 16U) & 0xFFU);
|
|
Rx321.EcuData.Fan2Speed = (Uint16)((uiMBOXMdl >> 8U) & 0xFFU);
|
|
Rx321.EcuData.CoolantPumpSpeed = (Uint16)((uiMBOXMdl >> 0U) & 0xFFU);
|
|
|
|
// Byte 4(>>24), 5(>>16)
|
|
Uint16 uiBarL = (Uint16)((uiMBOXMdh >> 24U) & 0xFFU);
|
|
Uint16 uiBarH = (Uint16)((uiMBOXMdh >> 16U) & 0xFFU);
|
|
Rx321.EcuData.BarometicPressure = uiBarL | (uiBarH << 8U);
|
|
}
|
|
|
|
// ---------------------------------------------------------
|
|
// MBOX30 - 322h
|
|
// ---------------------------------------------------------
|
|
if ((ECanRMPbit & (1UL << 30U)) != 0U)
|
|
{
|
|
uiMBOXMdl = ECanbMboxes.MBOX30.MDL.all;
|
|
|
|
// [Reverse] Byte 0(>>24), 1(>>16) -> TimeL
|
|
Uint16 uiTimeLL = (Uint16)((uiMBOXMdl >> 24U) & 0xFFU);
|
|
Uint16 uiTimeLH = (Uint16)((uiMBOXMdl >> 16U) & 0xFFU);
|
|
Rx322.EcuData.TotalOperTimeL = uiTimeLL | (uiTimeLH << 8U);
|
|
|
|
// [Reverse] Byte 2(>>8), 3(>>0) -> TimeH
|
|
Uint16 uiTimeHL = (Uint16)((uiMBOXMdl >> 8U) & 0xFFU);
|
|
Uint16 uiTimeHH = (Uint16)((uiMBOXMdl >> 0U) & 0xFFU);
|
|
Rx322.EcuData.TotalOperTimeH = uiTimeHL | (uiTimeHH << 8U);
|
|
|
|
GeneralOperValue.ulTotalOperationHour = ((Uint32)Rx322.EcuData.TotalOperTimeL) | ((Uint32)Rx322.EcuData.TotalOperTimeH << 16U);
|
|
GeneralOperValue.ulTotalOperationHour = (GeneralOperValue.ulTotalOperationHour > 1000000UL) ? 1000000UL : GeneralOperValue.ulTotalOperationHour;
|
|
}
|
|
|
|
ECanbRegs.CANRMP.all = ECanRMPbit;
|
|
PieCtrlRegs.PIEACK.all = PIEACK_GROUP9;
|
|
}
|
|
|
|
void CSendECanDataB(void)
|
|
{
|
|
struct ECAN_REGS ECanShadow;
|
|
static Uint16 uiSendPer100ms = 0U;
|
|
|
|
// 10ms
|
|
ECanbMboxes.MBOX0.MDL.byte.BYTE0 = 0x1;
|
|
ECanbMboxes.MBOX0.MDL.byte.BYTE1 = 0x2;
|
|
ECanbMboxes.MBOX0.MDL.byte.BYTE2 = 0x3;
|
|
ECanbMboxes.MBOX0.MDL.byte.BYTE3 = 0x4;
|
|
ECanbMboxes.MBOX0.MDH.byte.BYTE4 = 0x5;
|
|
ECanbMboxes.MBOX0.MDH.byte.BYTE5 = 0x6;
|
|
ECanbMboxes.MBOX0.MDH.byte.BYTE6 = 0x7;
|
|
ECanbMboxes.MBOX0.MDH.byte.BYTE7 = 0x8;
|
|
|
|
ECanShadow.CANTRS.all = ECanbRegs.CANTRS.all;
|
|
ECanShadow.CANTRS.bit.TRS1 = 1U; // 101h
|
|
ECanShadow.CANTRS.bit.TRS2 = 1U; // 102h
|
|
ECanShadow.CANTRS.bit.TRS3 = 1U; // 103h
|
|
ECanbRegs.CANTRS.all = ECanShadow.CANTRS.all;
|
|
|
|
ECanShadow.CANTA.all = ECanbRegs.CANTA.all;
|
|
ECanShadow.CANTA.bit.TA1 = 1U; // 101h
|
|
ECanShadow.CANTA.bit.TA2 = 1U; // 102h
|
|
ECanShadow.CANTA.bit.TA3 = 1U; // 103h
|
|
ECanbRegs.CANTA.all = ECanShadow.CANTA.all;
|
|
|
|
// 100ms
|
|
if(uiSendPer100ms == 0U)
|
|
{
|
|
ECanShadow.CANTRS.all = ECanbRegs.CANTRS.all;
|
|
ECanShadow.CANTRS.bit.TRS0 = 1U; // 100h
|
|
ECanShadow.CANTRS.bit.TRS4 = 1U; // 110h
|
|
ECanShadow.CANTRS.bit.TRS5 = 1U; // 120h
|
|
ECanShadow.CANTRS.bit.TRS6 = 1U; // 121h
|
|
ECanShadow.CANTRS.bit.TRS7 = 1U; // 130h
|
|
ECanShadow.CANTRS.bit.TRS8 = 1U; // 131h
|
|
ECanShadow.CANTRS.bit.TRS9 = 1U; // 132h
|
|
ECanbRegs.CANTRS.all = ECanShadow.CANTRS.all;
|
|
|
|
ECanShadow.CANTA.all = ECanbRegs.CANTA.all;
|
|
ECanShadow.CANTA.bit.TA0 = 1U; // 100h
|
|
ECanShadow.CANTA.bit.TA4 = 1U; // 110h
|
|
ECanShadow.CANTA.bit.TA5 = 1U; // 120h
|
|
ECanShadow.CANTA.bit.TA6 = 1U; // 121h
|
|
ECanShadow.CANTA.bit.TA7 = 1U; // 130h
|
|
ECanShadow.CANTA.bit.TA8 = 1U; // 131h
|
|
ECanShadow.CANTA.bit.TA9 = 1U; // 132h
|
|
ECanbRegs.CANTA.all = ECanShadow.CANTA.all;
|
|
}
|
|
uiSendPer100ms = (uiSendPer100ms + 1U) % 10U;
|
|
}
|
|
|
|
static void CInitECanB(void)
|
|
{
|
|
/* Create a shadow register structure for the CAN control registers. This is
|
|
needed, since only 32-bit access is allowed to these registers. 16-bit access
|
|
to these registers could potentially corrupt the register contents or return
|
|
false data. This is especially true while writing to/reading from a bit
|
|
(or group of bits) among bits 16 - 31 */
|
|
|
|
struct ECAN_REGS ECanbShadow = {};
|
|
|
|
EALLOW; // EALLOW enables access to protected bits
|
|
|
|
/* Enable internal pull-up for the selected CAN pins */
|
|
// Pull-ups can be enabled or disabled by the user.
|
|
// This will enable the pullups for the specified pins.
|
|
// Comment out other unwanted lines.
|
|
|
|
GpioCtrlRegs.GPAPUD.bit.GPIO20 = 0x00U; // Enable pull-up CANTXB
|
|
GpioCtrlRegs.GPAPUD.bit.GPIO21 = 0x00U; // Enable pull-up CANRXB
|
|
|
|
/* Set qualification for selected CAN pins to asynch only */
|
|
// Inputs are synchronized to SYSCLKOUT by default.
|
|
// This will select asynch (no qualification) for the selected pins.
|
|
|
|
GpioCtrlRegs.GPAQSEL2.bit.GPIO21 = 0x03U; // Asynch qual for CANRXB
|
|
|
|
/* Configure eCAN-A pins using GPIO regs*/
|
|
// This specifies which of the possible GPIO pins will be eCAN functional pins.
|
|
|
|
GpioCtrlRegs.GPAMUX2.bit.GPIO20 = 0x03U; // Configure CANTXB operation
|
|
GpioCtrlRegs.GPAMUX2.bit.GPIO21 = 0x03U; // Configure CANRXB operation
|
|
|
|
/* Configure eCAN RX and TX pins for CAN operation using eCAN regs*/
|
|
|
|
ECanbShadow.CANTIOC.all = ECanbRegs.CANTIOC.all;
|
|
ECanbShadow.CANTIOC.bit.TXFUNC = 1U;
|
|
ECanbRegs.CANTIOC.all = ECanbShadow.CANTIOC.all;
|
|
|
|
ECanbShadow.CANRIOC.all = ECanbRegs.CANRIOC.all;
|
|
ECanbShadow.CANRIOC.bit.RXFUNC = 1U;
|
|
ECanbRegs.CANRIOC.all = ECanbShadow.CANRIOC.all;
|
|
|
|
/* Configure eCAN for HECC mode - (reqd to access mailboxes 16 thru 31) */
|
|
// HECC mode also enables time-stamping feature
|
|
|
|
ECanbShadow.CANMC.all = ECanbRegs.CANMC.all;
|
|
ECanbShadow.CANMC.bit.SCB = 1;
|
|
ECanbRegs.CANMC.all = ECanbShadow.CANMC.all;
|
|
|
|
// TAn, RMPn, GIFn bits are all zero upon reset and are cleared again
|
|
// as a matter of precaution.
|
|
|
|
ECanbRegs.CANTA.all = 0xFFFFFFFFU; /* Clear all TAn bits */
|
|
ECanbRegs.CANRMP.all = 0xFFFFFFFFU; /* Clear all RMPn bits */
|
|
ECanbRegs.CANGIF0.all = 0xFFFFFFFFU; /* Clear all interrupt flag bits */
|
|
ECanbRegs.CANGIF1.all = 0xFFFFFFFFU;
|
|
|
|
/* Configure bit timing parameters for eCANB*/
|
|
ECanbShadow.CANMC.all = ECanbRegs.CANMC.all;
|
|
ECanbShadow.CANMC.bit.CCR = 1U; // Set CCR = 1
|
|
ECanbRegs.CANMC.all = ECanbShadow.CANMC.all;
|
|
|
|
ECanbShadow.CANES.all = ECanbRegs.CANES.all;
|
|
|
|
do
|
|
{
|
|
ECanbShadow.CANES.all = ECanbRegs.CANES.all;
|
|
} while(ECanbShadow.CANES.bit.CCE != 1U); // Wait for CCE bit to be set..
|
|
|
|
ECanbShadow.CANBTC.all = 0U;
|
|
|
|
// 250 [kbps]
|
|
ECanbShadow.CANBTC.bit.BRPREG = 19U;
|
|
ECanbShadow.CANBTC.bit.TSEG1REG = 10U;
|
|
ECanbShadow.CANBTC.bit.TSEG2REG = 2U;
|
|
|
|
ECanbShadow.CANBTC.bit.SAM = 1U;
|
|
ECanbShadow.CANBTC.bit.SJWREG = 2U;
|
|
ECanbRegs.CANBTC.all = ECanbShadow.CANBTC.all;
|
|
|
|
ECanbShadow.CANMC.all = ECanbRegs.CANMC.all;
|
|
ECanbShadow.CANMC.bit.CCR = 0U;
|
|
ECanbRegs.CANMC.all = ECanbShadow.CANMC.all;
|
|
|
|
ECanbShadow.CANES.all = ECanbRegs.CANES.all;
|
|
|
|
do
|
|
{
|
|
ECanbShadow.CANES.all = ECanbRegs.CANES.all;
|
|
} while (ECanbShadow.CANES.bit.CCE != 0U); // Wait for CCE bit to be cleared..
|
|
|
|
/* Disable all Mailboxes */
|
|
ECanbRegs.CANME.all = 0U; // Required before writing the MSGIDs
|
|
|
|
EDIS;
|
|
CECanBSetMbox();
|
|
}
|
|
|
|
static void CECanBSetMbox(void)
|
|
{
|
|
struct ECAN_REGS ECanShadow = {};
|
|
|
|
/* Tx Can MBox */
|
|
ECanbMboxes.MBOX0.MSGID.bit.IDE = 0U; // ID E®Aa ¿ⓒºI '0' - 11bit ID ≫c¿e
|
|
ECanbMboxes.MBOX0.MSGID.bit.STDMSGID = 0x100U;
|
|
ECanbMboxes.MBOX0.MSGID.bit.AME = 0U;
|
|
ECanbMboxes.MBOX0.MSGCTRL.bit.DLC = 8U;
|
|
ECanbMboxes.MBOX0.MSGCTRL.bit.RTR = 0U;
|
|
ECanbMboxes.MBOX0.MDH.all = 0x00000000U;
|
|
ECanbMboxes.MBOX0.MDL.all = 0x00000000U;
|
|
|
|
ECanbMboxes.MBOX1.MSGID.bit.IDE = 0U;
|
|
ECanbMboxes.MBOX1.MSGID.bit.STDMSGID = 0x101U;
|
|
ECanbMboxes.MBOX1.MSGID.bit.AME = 0U;
|
|
ECanbMboxes.MBOX1.MSGCTRL.bit.DLC = 8U;
|
|
ECanbMboxes.MBOX1.MSGCTRL.bit.RTR = 0U;
|
|
ECanbMboxes.MBOX1.MDH.all = 0x00000000U;
|
|
ECanbMboxes.MBOX1.MDL.all = 0x00000000U;
|
|
|
|
ECanbMboxes.MBOX2.MSGID.bit.IDE = 0U;
|
|
ECanbMboxes.MBOX2.MSGID.bit.STDMSGID = 0x102U;
|
|
ECanbMboxes.MBOX2.MSGID.bit.AME = 0U;
|
|
ECanbMboxes.MBOX2.MSGCTRL.bit.DLC = 8U;
|
|
ECanbMboxes.MBOX2.MSGCTRL.bit.RTR = 0U;
|
|
ECanbMboxes.MBOX2.MDH.all = 0x00000000U;
|
|
ECanbMboxes.MBOX2.MDL.all = 0x00000000U;
|
|
|
|
ECanbMboxes.MBOX3.MSGID.bit.IDE = 0U;
|
|
ECanbMboxes.MBOX3.MSGID.bit.STDMSGID = 0x103U;
|
|
ECanbMboxes.MBOX3.MSGID.bit.AME = 0U;
|
|
ECanbMboxes.MBOX3.MSGCTRL.bit.DLC = 8U;
|
|
ECanbMboxes.MBOX3.MSGCTRL.bit.RTR = 0U;
|
|
ECanbMboxes.MBOX3.MDH.all = 0x00000000U;
|
|
ECanbMboxes.MBOX3.MDL.all = 0x00000000U;
|
|
|
|
ECanbMboxes.MBOX4.MSGID.bit.IDE = 0U;
|
|
ECanbMboxes.MBOX4.MSGID.bit.STDMSGID = 0x110U;
|
|
ECanbMboxes.MBOX4.MSGID.bit.AME = 0U;
|
|
ECanbMboxes.MBOX4.MSGCTRL.bit.DLC = 8U;
|
|
ECanbMboxes.MBOX4.MSGCTRL.bit.RTR = 0U;
|
|
ECanbMboxes.MBOX4.MDH.all = 0x00000000U;
|
|
ECanbMboxes.MBOX4.MDL.all = 0x00000000U;
|
|
|
|
ECanbMboxes.MBOX5.MSGID.bit.IDE = 0U;
|
|
ECanbMboxes.MBOX5.MSGID.bit.STDMSGID = 0x120U;
|
|
ECanbMboxes.MBOX5.MSGID.bit.AME = 0U;
|
|
ECanbMboxes.MBOX5.MSGCTRL.bit.DLC = 8U;
|
|
ECanbMboxes.MBOX5.MSGCTRL.bit.RTR = 0U;
|
|
ECanbMboxes.MBOX5.MDH.all = 0x00000000U;
|
|
ECanbMboxes.MBOX5.MDL.all = 0x00000000U;
|
|
|
|
ECanbMboxes.MBOX6.MSGID.bit.IDE = 0U;
|
|
ECanbMboxes.MBOX6.MSGID.bit.STDMSGID = 0x121U;
|
|
ECanbMboxes.MBOX6.MSGID.bit.AME = 0U;
|
|
ECanbMboxes.MBOX6.MSGCTRL.bit.DLC = 8U;
|
|
ECanbMboxes.MBOX6.MSGCTRL.bit.RTR = 0U;
|
|
ECanbMboxes.MBOX6.MDH.all = 0x00000000U;
|
|
ECanbMboxes.MBOX6.MDL.all = 0x00000000U;
|
|
|
|
ECanbMboxes.MBOX7.MSGID.bit.IDE = 0U;
|
|
ECanbMboxes.MBOX7.MSGID.bit.STDMSGID = 0x130U;
|
|
ECanbMboxes.MBOX7.MSGID.bit.AME = 0U;
|
|
ECanbMboxes.MBOX7.MSGCTRL.bit.DLC = 8U;
|
|
ECanbMboxes.MBOX7.MSGCTRL.bit.RTR = 0U;
|
|
ECanbMboxes.MBOX7.MDH.all = 0x00000000U;
|
|
ECanbMboxes.MBOX7.MDL.all = 0x00000000U;
|
|
|
|
ECanbMboxes.MBOX8.MSGID.bit.IDE = 0U;
|
|
ECanbMboxes.MBOX8.MSGID.bit.STDMSGID = 0x131U;
|
|
ECanbMboxes.MBOX8.MSGID.bit.AME = 0U;
|
|
ECanbMboxes.MBOX8.MSGCTRL.bit.DLC = 8U;
|
|
ECanbMboxes.MBOX8.MSGCTRL.bit.RTR = 0U;
|
|
ECanbMboxes.MBOX8.MDH.all = 0x00000000U;
|
|
ECanbMboxes.MBOX8.MDL.all = 0x00000000U;
|
|
|
|
ECanbMboxes.MBOX9.MSGID.bit.IDE = 0U;
|
|
ECanbMboxes.MBOX9.MSGID.bit.STDMSGID = 0x132U;
|
|
ECanbMboxes.MBOX9.MSGID.bit.AME = 0U;
|
|
ECanbMboxes.MBOX9.MSGCTRL.bit.DLC = 8U;
|
|
ECanbMboxes.MBOX9.MSGCTRL.bit.RTR = 0U;
|
|
ECanbMboxes.MBOX9.MDH.all = 0x00000000U;
|
|
ECanbMboxes.MBOX9.MDL.all = 0x00000000U;
|
|
|
|
/* Rx Can MBox(GCU)*/
|
|
ECanbMboxes.MBOX15.MSGID.bit.IDE = 0U;
|
|
ECanbMboxes.MBOX15.MSGID.bit.STDMSGID = 0x200U;
|
|
ECanbMboxes.MBOX15.MSGID.bit.AME = 0U;
|
|
ECanbMboxes.MBOX15.MSGCTRL.bit.DLC = 8U;
|
|
ECanbMboxes.MBOX15.MSGCTRL.bit.RTR = 0U;
|
|
ECanbMboxes.MBOX15.MDH.all = 0x00000000U;
|
|
ECanbMboxes.MBOX15.MDL.all = 0x00000000U;
|
|
|
|
ECanbMboxes.MBOX16.MSGID.bit.IDE = 0U;
|
|
ECanbMboxes.MBOX16.MSGID.bit.STDMSGID = 0x201U;
|
|
ECanbMboxes.MBOX16.MSGID.bit.AME = 0U;
|
|
ECanbMboxes.MBOX16.MSGCTRL.bit.DLC = 8U;
|
|
ECanbMboxes.MBOX16.MSGCTRL.bit.RTR = 0U;
|
|
ECanbMboxes.MBOX16.MDH.all = 0x00000000U;
|
|
ECanbMboxes.MBOX16.MDL.all = 0x00000000U;
|
|
|
|
ECanbMboxes.MBOX17.MSGID.bit.IDE = 0U;
|
|
ECanbMboxes.MBOX17.MSGID.bit.STDMSGID = 0x210U;
|
|
ECanbMboxes.MBOX17.MSGID.bit.AME = 0U;
|
|
ECanbMboxes.MBOX17.MSGCTRL.bit.DLC = 8U;
|
|
ECanbMboxes.MBOX17.MSGCTRL.bit.RTR = 0U;
|
|
ECanbMboxes.MBOX17.MDH.all = 0x00000000U;
|
|
ECanbMboxes.MBOX17.MDL.all = 0x00000000U;
|
|
|
|
ECanbMboxes.MBOX18.MSGID.bit.IDE = 0U;
|
|
ECanbMboxes.MBOX18.MSGID.bit.STDMSGID = 0x220U;
|
|
ECanbMboxes.MBOX18.MSGID.bit.AME = 0U;
|
|
ECanbMboxes.MBOX18.MSGCTRL.bit.DLC = 8U;
|
|
ECanbMboxes.MBOX18.MSGCTRL.bit.RTR = 0U;
|
|
ECanbMboxes.MBOX18.MDH.all = 0x00000000U;
|
|
ECanbMboxes.MBOX18.MDL.all = 0x00000000U;
|
|
|
|
ECanbMboxes.MBOX19.MSGID.bit.IDE = 0U;
|
|
ECanbMboxes.MBOX19.MSGID.bit.STDMSGID = 0x221U;
|
|
ECanbMboxes.MBOX19.MSGID.bit.AME = 0U;
|
|
ECanbMboxes.MBOX19.MSGCTRL.bit.DLC = 8U;
|
|
ECanbMboxes.MBOX19.MSGCTRL.bit.RTR = 0U;
|
|
ECanbMboxes.MBOX19.MDH.all = 0x00000000U;
|
|
ECanbMboxes.MBOX19.MDL.all = 0x00000000U;
|
|
|
|
/* Rx Can MBox(ECU)*/
|
|
ECanbMboxes.MBOX25.MSGID.bit.IDE = 0U;
|
|
ECanbMboxes.MBOX25.MSGID.bit.STDMSGID = 0x300U;
|
|
ECanbMboxes.MBOX25.MSGID.bit.AME = 0U;
|
|
ECanbMboxes.MBOX25.MSGCTRL.bit.DLC = 8U;
|
|
ECanbMboxes.MBOX25.MSGCTRL.bit.RTR = 0U;
|
|
ECanbMboxes.MBOX25.MDH.all = 0x00000000U;
|
|
ECanbMboxes.MBOX25.MDL.all = 0x00000000U;
|
|
|
|
ECanbMboxes.MBOX26.MSGID.bit.IDE = 0U;
|
|
ECanbMboxes.MBOX26.MSGID.bit.STDMSGID = 0x301U;
|
|
ECanbMboxes.MBOX26.MSGID.bit.AME = 0U;
|
|
ECanbMboxes.MBOX26.MSGCTRL.bit.DLC = 8U;
|
|
ECanbMboxes.MBOX26.MSGCTRL.bit.RTR = 0U;
|
|
ECanbMboxes.MBOX26.MDH.all = 0x00000000U;
|
|
ECanbMboxes.MBOX26.MDL.all = 0x00000000U;
|
|
|
|
ECanbMboxes.MBOX27.MSGID.bit.IDE = 0U;
|
|
ECanbMboxes.MBOX27.MSGID.bit.STDMSGID = 0x310U;
|
|
ECanbMboxes.MBOX27.MSGID.bit.AME = 0U;
|
|
ECanbMboxes.MBOX27.MSGCTRL.bit.DLC = 8U;
|
|
ECanbMboxes.MBOX27.MSGCTRL.bit.RTR = 0U;
|
|
ECanbMboxes.MBOX27.MDH.all = 0x00000000U;
|
|
ECanbMboxes.MBOX27.MDL.all = 0x00000000U;
|
|
|
|
ECanbMboxes.MBOX28.MSGID.bit.IDE = 0U;
|
|
ECanbMboxes.MBOX28.MSGID.bit.STDMSGID = 0x320U;
|
|
ECanbMboxes.MBOX28.MSGID.bit.AME = 0U;
|
|
ECanbMboxes.MBOX28.MSGCTRL.bit.DLC = 8U;
|
|
ECanbMboxes.MBOX28.MSGCTRL.bit.RTR = 0U;
|
|
ECanbMboxes.MBOX28.MDH.all = 0x00000000U;
|
|
ECanbMboxes.MBOX28.MDL.all = 0x00000000U;
|
|
|
|
ECanbMboxes.MBOX29.MSGID.bit.IDE = 0U;
|
|
ECanbMboxes.MBOX29.MSGID.bit.STDMSGID = 0x321U;
|
|
ECanbMboxes.MBOX29.MSGID.bit.AME = 0U;
|
|
ECanbMboxes.MBOX29.MSGCTRL.bit.DLC = 8U;
|
|
ECanbMboxes.MBOX29.MSGCTRL.bit.RTR = 0U;
|
|
ECanbMboxes.MBOX29.MDH.all = 0x00000000U;
|
|
ECanbMboxes.MBOX29.MDL.all = 0x00000000U;
|
|
|
|
ECanbMboxes.MBOX30.MSGID.bit.IDE = 0U;
|
|
ECanbMboxes.MBOX30.MSGID.bit.STDMSGID = 0x322U;
|
|
ECanbMboxes.MBOX30.MSGID.bit.AME = 0U;
|
|
ECanbMboxes.MBOX30.MSGCTRL.bit.DLC = 8U;
|
|
ECanbMboxes.MBOX30.MSGCTRL.bit.RTR = 0U;
|
|
ECanbMboxes.MBOX30.MDH.all = 0x00000000U;
|
|
ECanbMboxes.MBOX30.MDL.all = 0x00000000U;
|
|
|
|
// Transe, Receive °aA¤, 0 is Transe, 1 is Receive
|
|
ECanShadow.CANMD.all = ECanbRegs.CANMD.all;
|
|
ECanShadow.CANMD.bit.MD0 = 0U;
|
|
ECanShadow.CANMD.bit.MD1 = 0U;
|
|
ECanShadow.CANMD.bit.MD2 = 0U;
|
|
ECanShadow.CANMD.bit.MD3 = 0U;
|
|
ECanShadow.CANMD.bit.MD4 = 0U;
|
|
ECanShadow.CANMD.bit.MD5 = 0U;
|
|
ECanShadow.CANMD.bit.MD6 = 0U;
|
|
ECanShadow.CANMD.bit.MD7 = 0U;
|
|
ECanShadow.CANMD.bit.MD8 = 0U;
|
|
ECanShadow.CANMD.bit.MD9 = 0U;
|
|
ECanShadow.CANMD.bit.MD15 = 1U;
|
|
ECanShadow.CANMD.bit.MD16 = 1U;
|
|
ECanShadow.CANMD.bit.MD17 = 1U;
|
|
ECanShadow.CANMD.bit.MD18 = 1U;
|
|
ECanShadow.CANMD.bit.MD19 = 1U;
|
|
ECanShadow.CANMD.bit.MD25 = 1U;
|
|
ECanShadow.CANMD.bit.MD26 = 1U;
|
|
ECanShadow.CANMD.bit.MD27 = 1U;
|
|
ECanShadow.CANMD.bit.MD28 = 1U;
|
|
ECanShadow.CANMD.bit.MD29 = 1U;
|
|
ECanShadow.CANMD.bit.MD30 = 1U;
|
|
ECanbRegs.CANMD.all = ECanShadow.CANMD.all;
|
|
|
|
// MailBox Enable/Disable, 0 is Disable, 1 is Enable
|
|
ECanShadow.CANME.all = ECanbRegs.CANME.all;
|
|
ECanShadow.CANME.bit.ME0 = 1U;
|
|
ECanShadow.CANME.bit.ME1 = 1U;
|
|
ECanShadow.CANME.bit.ME2 = 1U;
|
|
ECanShadow.CANME.bit.ME3 = 1U;
|
|
ECanShadow.CANME.bit.ME4 = 1U;
|
|
ECanShadow.CANME.bit.ME5 = 1U;
|
|
ECanShadow.CANME.bit.ME6 = 1U;
|
|
ECanShadow.CANME.bit.ME7 = 1U;
|
|
ECanShadow.CANME.bit.ME8 = 1U;
|
|
ECanShadow.CANME.bit.ME9 = 1U;
|
|
ECanShadow.CANME.bit.ME15 = 1U;
|
|
ECanShadow.CANME.bit.ME16 = 1U;
|
|
ECanShadow.CANME.bit.ME17 = 1U;
|
|
ECanShadow.CANME.bit.ME18 = 1U;
|
|
ECanShadow.CANME.bit.ME19 = 1U;
|
|
ECanShadow.CANME.bit.ME25 = 1U;
|
|
ECanShadow.CANME.bit.ME26 = 1U;
|
|
ECanShadow.CANME.bit.ME27 = 1U;
|
|
ECanShadow.CANME.bit.ME28 = 1U;
|
|
ECanShadow.CANME.bit.ME29 = 1U;
|
|
ECanShadow.CANME.bit.ME30 = 1U;
|
|
ECanbRegs.CANME.all = ECanShadow.CANME.all;
|
|
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EALLOW;
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ECanShadow.CANMC.all = ECanbRegs.CANMC.all;
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ECanShadow.CANMC.bit.STM = 0U; // '1' CAN Self-test Mode ¼³A¤
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ECanShadow.CANMC.bit.ABO = 1U; // '1' CAN Auto Bus On
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ECanbRegs.CANMC.all = ECanShadow.CANMC.all;
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|
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// Interrupt Enable(Receive Interrupt), 0 is Disable, 1 is Enable
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ECanShadow.CANMIM.all = ECanbRegs.CANMIM.all;
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ECanShadow.CANMIM.bit.MIM15 = 1U;
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ECanShadow.CANMIM.bit.MIM16 = 1U;
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ECanShadow.CANMIM.bit.MIM17 = 1U;
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ECanShadow.CANMIM.bit.MIM18 = 1U;
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ECanShadow.CANMIM.bit.MIM19 = 1U;
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ECanShadow.CANMIM.bit.MIM25 = 1U;
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ECanShadow.CANMIM.bit.MIM26 = 1U;
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ECanShadow.CANMIM.bit.MIM27 = 1U;
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ECanShadow.CANMIM.bit.MIM28 = 1U;
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ECanShadow.CANMIM.bit.MIM29 = 1U;
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ECanShadow.CANMIM.bit.MIM30 = 1U;
|
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ECanbRegs.CANMIM.all = ECanShadow.CANMIM.all;
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|
|
|
// Groble Interrupt
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ECanShadow.CANGIM.all = ECanbRegs.CANGIM.all;
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ECanShadow.CANGIM.bit.I0EN = 1U; // Line 0 Interrupt Enable
|
|
ECanShadow.CANGIM.bit.GIL = 0U; // All global interrupts are mapped to the ECAN0INT interrupt line.
|
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ECanbRegs.CANGIM.all = ECanShadow.CANGIM.all;
|
|
EDIS;
|
|
}
|
|
|
|
void CInitEcan(void)
|
|
{
|
|
CInitECanA();
|
|
CInitECanB();
|
|
|
|
CInitECanStructure();
|
|
}
|
|
|
|
static void CInitECanStructure(void)
|
|
{
|
|
// Tx
|
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(void) memset(&Tx100, 0, sizeof(CTx100));
|
|
(void) memset(&Tx101, 0, sizeof(CTx101));
|
|
(void) memset(&Tx102, 0, sizeof(CTx102));
|
|
(void) memset(&Tx103, 0, sizeof(CTx103));
|
|
(void) memset(&Tx110, 0, sizeof(CTx110));
|
|
(void) memset(&Tx120, 0, sizeof(CTx120));
|
|
(void) memset(&Tx121, 0, sizeof(CTx121));
|
|
(void) memset(&Tx130, 0, sizeof(CTx130));
|
|
(void) memset(&Tx131, 0, sizeof(CTx131));
|
|
(void) memset(&Tx132, 0, sizeof(CTx132));
|
|
|
|
// Rx - GCU
|
|
(void) memset(&Rx200, 0, sizeof(CRx200));
|
|
(void) memset(&Rx201, 0, sizeof(CRx201));
|
|
(void) memset(&Rx210, 0, sizeof(CRx210));
|
|
(void) memset(&Rx220, 0, sizeof(CRx220));
|
|
(void) memset(&Rx221, 0, sizeof(CRx221));
|
|
|
|
// Rx - ECU
|
|
(void) memset(&Rx300, 0, sizeof(CRx300));
|
|
(void) memset(&Rx301, 0, sizeof(CRx301));
|
|
(void) memset(&Rx310, 0, sizeof(CRx310));
|
|
(void) memset(&Rx320, 0, sizeof(CRx320));
|
|
(void) memset(&Rx321, 0, sizeof(CRx321));
|
|
(void) memset(&Rx322, 0, sizeof(CRx322));
|
|
}
|